Učni načrt predmeta

Predmet:

Snovanje vgradnih sistemov

Course:

Embedded System Design

Študijski program in stopnja / Study programme and level	Študijska smer / Study field	Letnik / Academic year	Semester / Semester
Informacijske in komunikacijske tehnologije, 3. stopnja	Računalniške strukture in sistemi	1	1
Information and Communication Technologies, 3rd cycle	Computer Structures and Systems	1	1

Vrsta predmeta / Course type

Izbirni / Elective

Univerzitetna koda predmeta / University course code:

IKT3-699

Predavanja Lectures	Seminar Seminar	Vaje Tutorial	Klinične vaje work	Druge oblike študija	Samost. delo Individ. work	ECTS
15	15			15	105	5

*Navedena porazdelitev ur velja, če je vpisanih vsaj 15 študentov. Drugače se obseg izvedbe kontaktnih ur sorazmerno zmanjša in prenese v samostojno delo. / This distribution of hours is valid if at least 15 students are enrolled. Otherwise the contact hours are linearly reduced and transfered to individual work.

Nosilec predmeta / Course leader:

doc. dr. Anton Biasizzo

Sodelavci / Lecturers:

Jeziki / Languages:

Predavanja / Lectures:

Slovenščina, angleščina / Slovenian, English

Vaje / Tutorial:

Pogoji za vključitev v delo oz. za opravljanje študijskih obveznosti:

Prerequisits:

Vsebina:

Content (Syllabus outline):

Vgradni sistemi: uvod, pregled področja snovanja vgradnih sistemov, pregled glavnih smeri razvoja, trendov in tehnologij vgradnih sistemov.

Strojna oprema vgradnih sistemov: vgradni procesorji, mikrokrmilniki, RISC in DSP procesorji, pomnilnik in neizbrisljiv pomnilnik, vhodno/izhodne naprave, prekinitve, vmesniki, časovniki, pretvorniki, krmiljenje napajanja.
 
Napredne strukture vgradnih sistemov: večprocesorski vgradni sistemi, zanesljivi vgradni sistemi, namenska strojna jedra, rekonfigurabilni sistemi.

Izvedba s programirljivimi vezji FPGA: vezja FPGA, jezik za opis strojne opreme VHDL, mehka procesorska jedra, jedra zunanjih naprav, razvijalska vezja FPGA.

Izvedbe zmogljivejših vgradnih sistemov:
- ARM procesorji,
- FPGA strojni pospeševalniki,
- sistemi z nizko porabo energije.

Programska oprema vgradnih sistemov: operacijski sistem, razvrščevalnik opravil, obdelava prekinitev in izjem, latentnost prekinitev, operacijski sistemi v realnem času, gonilniki.

Snovanja programske opreme: tok razvoja programske opreme, prevajanje izvorne kode in križni prevajalniki, prilagoditev jedra operacijskega sistema, simulacija in emulacija, razhroščevanje.

Napredno snovanje vgradnih sistemov: sočasno načrtovanje programske in strojne opreme.

Embedded system: introduction, embedded system design survey, new research areas, trends and technologies in embedded system design.

Embedded system hardware: embedded processors, microcontrollers, RISC and DSP processors, RAM memory and nonvolatile memory, peripheral devices, interrupts, interfaces, timers, converters, power control.

Advanced embedded system structures: multiprocessor embedded system, dependable embedded system, application specific hardware cores, reconfigurable systems.

FPGA based implementation: FPGA circuits, VHDL hardware description language, soft processor cores, peripheral cores, FPGA development boards.

Advanced embedded system implementations:
- ARM processors,
- FPGA hardware accelerators,
- Low power design.

Embedded system software: operating system, task scheduler, interrupt and exception servicing, interrupt latency, real-time operating system, device drivers.

Embedded system software design: software design flow, source code compilation and cross-compilers, operating system kernel porting, simulation and emulation, debugging.

Advanced topics in embedded system design: hardware/software co-design.

Temeljna literatura in viri / Readings:

Cilji in kompetence:

Objectives and competences:

Predvideni študijski rezultati:

Intendeded learning outcomes:

Metode poučevanja in učenja:

Learning and teaching methods:

Načini ocenjevanja:

Delež v % / Weight in %

Assesment:

Seminarska naloga

50 %

Seminar work

Ustni zagovor seminarske naloge

50 %

Oral defense of seminar work

Reference nosilca / Lecturer's references:

1.	U. Legat, A. Biasizzo, and F. Novak, “SEU recovery mechanism for SRAM-based FPGAs”,IEEE trans. on nuclear science, vol. 59, no 5, pp. 2562-2571, 2012.
2.	A. Biasizzo and F. Novak, “Hardware accelerated compression of LIDAR data using FPGA devices”, Sensors, vol. 13, no. 5, pp. 6405-6422, 2013.
3.	A. Biasizzo, “ On-line testing and recovery of systems with dynamic partial reconfiguration = Sprotno preiskušanje in popravljanje sistemov z dinamično delno rekonfiguracijo”, Informacije MIDEM, vol. 43, no. 4, pp. 259-266, 2013.
4.	A. Biasizzo, F. Novak, and P. Korošec, “A multi-alphabet arithmetic coding hardware implementation for small FPGA devices”, Journal of electrical engineering, vol. 64, no. 1, pp 44-49, 2013.
5.	A. Biasizzo and F. Novak, “Security problems of scan design and accompanying measures”, Journal of electrical engineering, vol. 67, no. 3, pp 192-198, 2016.